The instant invention generally relates to the fabrication of packages for integrated circuit devices and more specifically to the deconstruction and reconstruction of encapsulation packages for integrated circuit devices where at least some of the packaging encapsulation material is removed by lapping.
The process of designing and producing integrated circuit devices is intensive in both time and human capital, requiring the efforts of highly talented and educated individuals. Upon the design of a new integrated circuit, the first die produced must be tested to verify that it is performing in accordance with the design requirements.
The conventional package design for integrated circuit dies has been a plastic package, comprising a metal lead frame and a polymeric insulating material. As the process of encapsulating a die in molded plastic packages can be automated easily, plastic packages are relatively inexpensive compared to ceramic or hybrid hermetic packages. Plastic encapsulation of dies has thus become a mainstay of the electronics industry.
With a few modifications, the basic assembly process for encapsulation packaging of dies can be used to construct a variety of package types. For example, FIG. 1 illustrates a pin-in-hole package: a dual-in-line package (DIP). FIGS. 2-3 illustrate two surface mount packages: a plastic leaded chip carrier (PLCC) and a quad flatpack (QFP), respectively. Each of these plastic packages is constructed from basic assembly techniques known in the art.
Most currently manufactured integrated circuits are packaged or encapsulated in epoxy using the techniques described above. The integrated circuit packaging industry now resides primarily outside of the United States. Because relatively little domestic investment has been made for development of required tooling and equipment for this process, most necessary equipment is also manufactured outside the United States. Therefore, when a domestic company requires packaging of an integrated circuit die, it typically must pay the price for the offshore service and wait the required time for delivery. Added costs and potentially costly marketing delays are consequently created for chip design companies eager to evaluate newly manufactured prototype devices.
Although package construction from ceramic material is an alternative for packaging an integrated circuit die, ceramic packaging is relatively expensive and consequently is used primarily for high performance applications, such as weaponry. If the die design and intended application permits characterization of device performance in an available substitute package, such as a ceramic package, an alternative packaging method is provided for rapid evaluation of prototype chip designs. In addition to the cost of the alternative packaging, an alternative such as a ceramic package may be a poor substitute for simulating the performance of the die as encapsulated in the manner intended for full-scale production of the device. This is because, depending upon the die""s design, the function of the integrated circuit die may be affected by the presence of different encapsulating materials on its surface, and the dimensions of the package conductor paths (leads). If die performance characteristics are sensitive to the encapsulation package, reevaluation and revalidation of the die design may become necessary in the final, production die-package configuration.
Another disadvantage of the use of ceramic packages for prototype units is that the package geometry may necessitate a modification of test sockets and printed circuit boards to receive the prototype ceramic packages for testing and validation of the new die design.
It is thus desirable to be able to test various dies where the dies are encapsulated in the same encapsulant and in a package geometry which allows the various dies to be tested by the same printed circuit boards. A need thus exists for rapid and efficient methods for being able to change dies within a given integrated circuit package and encapsulated by a given encapsulant so that the different dies may be evaluated.
In one embodiment, a method is provided for deconstructing an integrated circuit package comprising: taking an integrated circuit package comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, and an encapsulant encapsulating the wire bond pads; and removing the encapsulant to expose the wire bond pads; wherein at least a portion of the encapsulant is removed by a lapping process.
According to this embodiment, the integrated circuit package may further comprise a die which is in electrical contact with the lead frame via the wire bond pads, the method further comprising removing the die from the integrated circuit package. Optionally, at least a portion of the die may be removed from the integrated circuit package by lapping the die.
Also according to this embodiment, the method may comprise cleaning the wire bond pads by lapping, polishing the wire bond pads by lapping, and/or attaching a die to the exposed wire bond pads. Each of these steps may be performed, at least in part, by lapping.
Also according to this embodiment, the method may comprise encapsulating the die and wire bond pads in an encapsulant, and optionally, altering the shape of the encapsulant encapsulating the die and wire bond pads. Altering the shape of the encapsulant may be performed by lapping the encapsulant.
In another embodiment, a method for deconstructing an integrated circuit package is provided which comprises: taking an integrated circuit package comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, and an encapsulant encapsulating the wire bond pads; removing the encapsulant to expose the wire bond pads; and cleaning the wire bond pads; wherein at least one of removing the encapsulant and cleaning the wire bond pads is at least partially performed by a lapping process.
In another embodiment, a method for deconstructing an integrated circuit package is provided which comprises: taking an integrated circuit package comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, and an encapsulant encapsulating the wire bond pads; removing the encapsulant to expose the wire bond pads; cleaning the wire bond pads; and polishing the wire bond pads; wherein at least one of removing the encapsulant, cleaning the wire bond pads, and polishing the wire bond pads is at least partially performed by a lapping process.
In another embodiment, a method for deconstructing an integrated circuit package is provided which comprises: taking an integrated circuit package comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, a die attached to the wire bond pads, and an encapsulant encapsulating the wire bond pads; removing the encapsulant to expose the wire bond pads; removing the die; and cleaning the wire bond pads; wherein at least one of removing the encapsulant, removing the die, and cleaning the wire bond pads is at least partially performed by a lapping process.
In another embodiment, a method for deconstructing an integrated circuit package is provided which comprises: taking an integrated circuit package comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, a die attached to the wire bond pads, and an encapsulant encapsulating the wire bond pads; removing the encapsulant to expose the wire bond pads; removing the die; and cleaning the wire bond pads; attaching a second die to the wire bond pads; and reencapsulating the die; wherein at least one of removing the encapsulant, removing the die, and cleaning the wire bond pads is at least partially performed by a lapping process.
In another embodiment, a method for deconstructing an integrated circuit package is provided which comprises: taking an integrated circuit package comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, a first die attached to the wire bond pads, and an encapsulant encapsulating the wire bond pads; removing the encapsulant to expose the wire bond pads; removing the first die; cleaning the wire bond pads; polishing the wire bond pads; attaching a second die to the wire bond pads; and reencapsulating the die; wherein at least one of removing the encapsulant, removing the die, cleaning the wire bond pads, and polishing the wire bond pads is at least partially performed by a lapping process.
In another embodiment, a method for deconstructing an integrated circuit package is provided which comprises: taking integrated circuit packages comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, a first die attached to the wire bond pads, and an encapsulant encapsulating the wire bond pads; removing the encapsulants from the integrated circuit packages to expose the wire bond pads; removing the first dies from the integrated circuit packages; attaching second dies to the wire bond pads of the integrated circuit packages; and reencapsulating the second dies; wherein at least one of removing the encapsulants and removing the first dies is at least partially performed by a lapping two or more of the plurality of integrated circuit packages at the same time.
In another embodiment, a method for deconstructing an integrated circuit package is provided which comprises: taking integrated circuit packages comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, a first die attached to the wire bond pads, and an encapsulant encapsulating the wire bond pads; removing the encapsulants from the integrated circuit packages to expose the wire bond pads; removing the first dies from the integrated circuit packages; cleaning the wire bond pads of the integrated circuit packages; attaching second dies to the wire bond pads of the integrated circuit packages; and reencapsulating the second dies; wherein at least one of removing the encapsulant, removing the die, and cleaning the wire bond pads is at least partially performed by a lapping two or more of the plurality of integrated circuit packages at the same time.
In another embodiment, a method for deconstructing an integrated circuit package is provided which comprises: taking integrated circuit packages comprising a lead frame having a plurality of wire bond pads for placing a die into electrical contact with the lead frame, a first die attached to the wire bond pads, and an encapsulant encapsulating the wire bond pads; removing the encapsulants from the integrated circuit packages to expose the wire bond pads; removing the first dies from the integrated circuit packages; cleaning the wire bond pads of the integrated circuit packages; polishing the wire bond pads of the integrated circuit packages; attaching second dies to the wire bond pads of the integrated circuit packages; and reencapsulating the second dies; wherein at least one of removing the encapsulant, removing the die, cleaning the wire bond pads, and polishing the wire bond pads is at least partially performed by a lapping two or more of the plurality of integrated circuit packages at the same time.
In another embodiment, a method for reconstructing an integrated circuit package is provided which comprises: attaching a die to exposed wire bond pads of a lead frame so that the die is electrically connected to the lead frame; and encapsulating the die and the wire bond pads in an encapsulant; and reshaping an upper surface of the encapsulant where at least a portion of the encapsulant reshaping is performed by a lapping process.
According to this embodiment, encapsulating the die and the wire bond pads may result in the encapsulant having a convex or concave an upper surface, and reshaping the encapsulant may result in the encapsulant having a planar an upper surface.
Also according to this embodiment, the method may further comprise marking the reshaped upper surface of the encapsulant.
Also according to this embodiment, the reshaped upper surface of the encapsulant is preferably sufficiently flat to permit labeling by printing, photolithographic or mechanical marking techniques to simulate a production transfer molded encapsulated chip package, the method further comprising marking the reshaped upper surface of the encapsulant.
According to any of the above embodiments, lapping may be performed by any lapping technique. For example, lapping may be performed by an abrasive or ablative lapping process. Lapping may be performed by a mechanical, chemical, or electromagnetic lapping process. In one variation, lapping is performed using a laser or another source of electromagnetic radiation. In another variation, lapping is performed using a planar abrasive surface. In another variation, lapping is performed using a planar abrasive surface attached to a wheel or belt. In another variation, lapping is performed using a planar abrasive surface that is sufficiently large to permit more than one package to be lapped at the same time. In another variation, lapping is performed by chemical etching. In another variation, lapping is performed using a gas-jet or liquid-jet containing a particulate material. In another variation, lapping is performed via a mechanical grind. In another variation, lapping is performed using a combination of mechanical and chemical ablation. In another variation, lapping is performed using a combination of mechanical and electromagnetic ablation. In another variation, lapping is performed using laser ablation. In another variation, lapping is performed using a combination of electromagnetic and chemical ablation. In another variation, lapping is performed by impinging an ultra-fine particulate using a high pressure gas-jet against the material to be lapped. In another variation, lapping is performed by impinging an ultra-fine particulate under high pressure against the material to be lapped. In another variation, lapping is performed by delivering a pulsating liquid-jet under high pressure against the material to be lapped. In another variation, lapping is performed by plasma etching. In another variation, lapping is performed by a pressurized liquid against the material to be lapped.
Also according to any of the above embodiments, cleaning of the exposed wire bond pads may be performed by liquid impingement upon the surface of the wire bond pads and/or by the use of ultrasound. For example, de-ionized water may be delivered using a high pressure pulsating liquid ejector device. The de-ionized water may then be removed by delivering electronic grade alcohol using a high pressure pulsating liquid ejector device. Cleaning the wire bond pads may also comprise the use of ultrasound in combination with de-ionized water and/or alcohol.